`timescale 1ns / 1ps
//////////////////////////////////////////////////////////////////////////////////
// Company: 
// Engineer: 
// 
// Create Date: 2024/02/27 23:29:29
// Design Name: 
// Module Name: tb_float
// Project Name: 
// Target Devices: 
// Tool Versions: 
// Description: 
// 
// Dependencies: 
// 
// Revision:
// Revision 0.01 - File Created
// Additional Comments:
// 
//////////////////////////////////////////////////////////////////////////////////


module float_tb();
     reg aclk;
     reg s_axis_a_tvalid;
     reg [31:0] s_axis_a_tdata;
     reg s_axis_b_tvalid;
     reg [31:0] s_axis_b_tdata;
     reg m_axis_result_tready;
     wire m_axis_result_tvalid;
     wire [31:0] m_axis_result_tdata;


float r_float_multiply(
    .aclk(aclk),
    .s_axis_a_tvalid(s_axis_a_tvalid),                    
    .s_axis_a_tdata(s_axis_a_tdata),             
    .s_axis_b_tvalid(s_axis_b_tvalid),            
    .s_axis_b_tdata(s_axis_b_tdata),
    .m_axis_result_tready(m_axis_result_tready), 
    .m_axis_result_tvalid(m_axis_result_tvalid),
    .m_axis_result_tdata(m_axis_result_tdata)

);

always #5 aclk=~aclk;
initial begin
    aclk=1'b0;
    m_axis_result_tready=1'b1;
#15;     s_axis_a_tvalid<=1'b1;
            s_axis_a_tdata<=32'b0100_0000_0111_1111_0010_1011_0000_0010;    
            s_axis_b_tvalid<=1'b1;
            s_axis_b_tdata<=32'b0100_0000_1000_0110_0111_1110_1111_1010;
end

endmodule
